FIG. 1 is a block diagram of a current processing system having dual data rate (DDR) memory modules and non-volatile memory. Example computer system 100 includes one or more processor cores 110 that are coupled to memory. Processor core(s) 110 may be coupled to multiple dual-inline memory modules (DIMMs) 130 via DDR channels 120. Computer system 100 includes two DDR channels, but additional links may also be included.
Processor core(s) 110 may also be coupled to non-volatile memory 160 via link 150. The non-volatile memory may include, for example, flash memory (NAND or NOR), phase change memory, etc. In these systems memory bandwidth is dependent on DDR technology scaling and the number of DDR channels in the system.
Beyond certain frequencies, scaling of DDR channels becomes increasingly expensive and complex. Thus, increasing memory bandwidth by adding DDR channels and/or increasing channel frequency can drastically increase the cost of the system.